Lista rozkazów - tabela: Różnice pomiędzy wersjami

Z ZX Spectrum Wiki
(Prefix DDED)
(Operacje z rejestrem IX)
Linia 1209: Linia 1209:
 
|[[Rozkaz |ex de,hl]]
 
|[[Rozkaz |ex de,hl]]
 
|[[Rozkaz |call pe,NN]]
 
|[[Rozkaz |call pe,NN]]
|<b>[[#Prefix DDED|prefix DDED]]</b>
+
|&nbsp;
 
|[[Rozkaz |xor N]]
 
|[[Rozkaz |xor N]]
 
|[[Rozkaz |rst 40]]
 
|[[Rozkaz |rst 40]]
Linia 1539: Linia 1539:
 
|[[Rozkaz |set 7,a]]
 
|[[Rozkaz |set 7,a]]
 
|}
 
|}
 +
 
== Operacje z rejestrem IY ==
 
== Operacje z rejestrem IY ==

Wersja z 10:46, 30 maj 2014

Podstawowe

\ x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF
0x nop ld bc,NN ld (bc),a inc bc inc b dec b ld b,N rlc a ex af,af' add hl,bc ld a,(bc) dec bc inc c dec c ld c,N rrc a
1x djnz X ld de,NN ld (de),a inc de inc d dec d ld d,N rla jr X add hl,de ld a,(de) dec de inc e dec e ld e,N rra
2x jr nz,X ld hl,NN ld (NN),hl inc hl inc h dec h ld h,N daa jr z,X add hl,hl ld hl,(NN) dec hl inc l dec l ld l,N cpl
3x jr nc,X ld sp,NN ld (NN),a inc sp inc (hl) dec (hl) ld (hl),N scf jr c,X add hl,sp ld a,(NN) dec sp inc a dec a ld a,N ccf
4x ld b,b ld b,c ld b,d ld b,e ld b,h ld b,l ld b,(hl) ld b,a ld c,b ld c,c ld c,d ld c,e ld c,h ld c,l ld c,(hl) ld c,a
5x ld d,b ld d,c ld d,d ld d,e ld d,h ld d,l ld d,(hl) ld d,a ld e,b ld e,c ld e,d ld e,e ld e,h ld e,l ld e,(hl) ld e,a
6x ld h,b ld h,c ld h,d ld h,e ld h,h ld h,l ld h,(hl) ld h,a ld l,b ld l,c ld l,d ld l,e ld l,h ld l,l ld l,(hl) ld l,a
7x ld (hl),b ld (hl),c ld (hl),d ld (hl),e ld (hl),h ld (hl),l halt ld (hl),a ld a,b ld a,c ld a,d ld a,e ld a,h ld a,l ld a,(hl) ld a,a
8x add a,b add a,c add a,d add a,e add a,h add a,l add a,(hl) add a,a adc a,b adc a,c adc a,d adc a,e adc a,h adc a,l adc a,(hl) adc a,a
9x sub b sub c sub d sub e sub h sub l sub (hl) sub a sbc a,b sbc a,c sbc a,d sbc a,e sbc a,h sbc a,l sbc a,(hl) sbc a,a
Ax and b and c and d and e and h and l and (hl) and a xor b xor c xor d xor e xor h xor l xor (hl) xor a
Bx or b or c or d or e or h or l or (hl) or a cp b cp c cp d cp e cp h cp l cp (hl) cp a
Cx ret nz pop bc jp nz,NN jp NN call nz,NN push bc add a,N rst 0 ret z ret jp z,NN prefix CB call z,NN call NN adc a,N rst 8
Dx ret nc pop de jp nc,NN out (N),a call nc,NN push de sub N rst 16 ret c exx jp c,NN in a,(N) call c,NN prefix DD sbc a,N rst 24
Ex ret po pop hl jp po,NN ex (sp),hl call po,NN push hl and N rst 32 ret pe jp (hl) jp pe,NN ex de,hl call pe,NN prefix ED xor N rst 40
Fx ret p pop af jp p,NN di call p,NN push af or N rst 48 ret m ld sp,hl jp m,NN ei call m,NN prefix FD cp N rst 56

Prefix CB

\ x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF
0x rlc b rlc c rlc d rlc e rlc h rlc l rlc (hl) rlc a rrc b rrc c rrc d rrc e rrc h rrc l rrc (hl) rrc a
1x rl b rl c rl d rl e rl h rl l rl (hl) rl a rr b rr c rr d rr e rr h rr l rr (hl) rr a
2x sla b sla c sla d sla e sla h sla l sla (hl) sla a sra b sra c sra d sra e sra h sra l sra (hl) sra a
3x sll b sll c sll d sll e sll h sll l sll (hl) sll a srl b srl c srl d srl e srl h srl l srl (hl) srl a
4x bit 0,b bit 0,c bit 0,d bit 0,e bit 0,h bit 0,l bit 0,(hl) bit 0,a bit 1,b bit 1,c bit 1,d bit 1,e bit 1,h bit 1,l bit 1,(hl) bit 1,a
5x bit 2,b bit 2,c bit 2,d bit 2,e bit 2,h bit 2,l bit 2,(hl) bit 2,a bit 3,b bit 3,c bit 3,d bit 3,e bit 3,h bit 3,l bit 3,(hl) bit 3,a
6x bit 4,b bit 4,c bit 4,d bit 4,e bit 4,h bit 4,l bit 4,(hl) bit 4,a bit 5,b bit 5,c bit 5,d bit 5,e bit 5,h bit 5,l bit 5,(hl) bit 5,a
7x bit 6,b bit 6,c bit 6,d bit 6,e bit 6,h bit 6,l bit 6,(hl) bit 6,a bit 7,b bit 7,c bit 7,d bit 7,e bit 7,h bit 7,l bit 7,(hl) bit 7,a
8x res 0,b res 0,c res 0,d res 0,e res 0,h res 0,l res 0,(hl) res 0,a res 1,b res 1,c res 1,d res 1,e res 1,h res 1,l res 1,(hl) res 1,a
9x res 2,b res 2,c res 2,d res 2,e res 2,h res 2,l res 2,(hl) res 2,a res 3,b res 3,c res 3,d res 3,e res 3,h res 3,l res 3,(hl) res 3,a
Ax res 4,b res 4,c res 4,d res 4,e res 4,h res 4,l res 4,(hl) res 4,a res 5,b res 5,c res 5,d res 5,e res 5,h res 5,l res 5,(hl) res 5,a
Bx res 6,b res 6,c res 6,d res 6,e res 6,h res 6,l res 6,(hl) res 6,a res 7,b res 7,c res 7,d res 7,e res 7,h res 7,l res 7,(hl) res 7,a
Cx set 0,b set 0,c set 0,d set 0,e set 0,h set 0,l set 0,(hl) set 0,a set 1,b set 1,c set 1,d set 1,e set 1,h set 1,l set 1,(hl) set 1,a
Dx set 2,b set 2,c set 2,d set 2,e set 2,h set 2,l set 2,(hl) set 2,a set 3,b set 3,c set 3,d set 3,e set 3,h set 3,l set 3,(hl) set 3,a
Ex set 4,b set 4,c set 4,d set 4,e set 4,h set 4,l set 4,(hl) set 4,a set 5,b set 5,c set 5,d set 5,e set 5,h set 5,l set 5,(hl) set 5,a
Fx set 6,b set 6,c set 6,d set 6,e set 6,h set 6,l set 6,(hl) set 6,a set 7,b set 7,c set 7,d set 7,e set 7,h set 7,l set 7,(hl) set 7,a

Prefix ED

\ x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF
0x                                
1x                                
2x                                
3x                                
4x in b,(c) out (c),b sbc hl,bc ld (NN),bc neg retn im 0 ld i,a in c,(c) out (c),c adc hl,bc ld bc,(NN)   reti   ld r,a
5x in d,(c) out (c),d sbc hl,de ld (NN),de     im 1 ld a,i in e,(c) out (c),e adc hl,de ld de,(NN)     im 2 ld a,r
6x in h,(c) out (c),h sbc hl,hl ld (NN),hl       rrd in l,(c) out (c),l adc hl,hl ld hl,(NN)       rld
7x in f,(c) out (c),f sbc hl,sp ld (NN),sp         in a,(c) out (c),a adc hl,sp ld sp,(NN)        
8x                                
9x                                
Ax ldi cpi ini outi         ldd cpd ind outd        
Bx ldir cpir inir otir         lddr cpdr indr otdr        
Cx                                
Dx                                
Ex                                
Fx                                

Operacje z rejestrem IX

\ x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF
0x nop ld bc,NN ld (bc),a inc bc inc b dec b ld b,N rlc a ex af,af' add hl,bc ld a,(bc) dec bc inc c dec c ld c,N rrc a
1x djnz X ld de,NN ld (de),a inc de inc d dec d ld d,N rla jr X add hl,de ld a,(de) dec de inc e dec e ld e,N rra
2x jr nz,X ld hl,NN ld (NN),hl inc hl inc h dec h ld h,N daa jr z,X add hl,hl ld hl,(NN) dec hl inc l dec l ld l,N cpl
3x jr nc,X ld sp,NN ld (NN),a inc sp inc (hl) dec (hl) ld (hl),N scf jr c,X add hl,sp ld a,(NN) dec sp inc a dec a ld a,N ccf
4x ld b,b ld b,c ld b,d ld b,e ld b,h ld b,l ld b,(hl) ld b,a ld c,b ld c,c ld c,d ld c,e ld c,h ld c,l ld c,(hl) ld c,a
5x ld d,b ld d,c ld d,d ld d,e ld d,h ld d,l ld d,(hl) ld d,a ld e,b ld e,c ld e,d ld e,e ld e,h ld e,l ld e,(hl) ld e,a
6x ld h,b ld h,c ld h,d ld h,e ld h,h ld h,l ld h,(hl) ld h,a ld l,b ld l,c ld l,d ld l,e ld l,h ld l,l ld l,(hl) ld l,a
7x ld (hl),b ld (hl),c ld (hl),d ld (hl),e ld (hl),h ld (hl),l halt ld (hl),a ld a,b ld a,c ld a,d ld a,e ld a,h ld a,l ld a,(hl) ld a,a
8x add a,b add a,c add a,d add a,e add a,h add a,l add a,(hl) add a,a adc a,b adc a,c adc a,d adc a,e adc a,h adc a,l adc a,(hl) adc a,a
9x sub b sub c sub d sub e sub h sub l sub (hl) sub a sbc a,b sbc a,c sbc a,d sbc a,e sbc a,h sbc a,l sbc a,(hl) sbc a,a
Ax and b and c and d and e and h and l and (hl) and a xor b xor c xor d xor e xor h xor l xor (hl) xor a
Bx or b or c or d or e or h or l or (hl) or a cp b cp c cp d cp e cp h cp l cp (hl) cp a
Cx ret nz pop bc jp nz,NN jp NN call nz,NN push bc add a,N rst 0 ret z ret jp z,NN prefix DDCB call z,NN call NN adc a,N rst 8
Dx ret nc pop de jp nc,NN out (N),a call nc,NN push de sub N rst 16 ret c exx jp c,NN in a,(N) call c,NN   sbc a,N rst 24
Ex ret po pop hl jp po,NN ex (sp),hl call po,NN push hl and N rst 32 ret pe jp (hl) jp pe,NN ex de,hl call pe,NN   xor N rst 40
Fx ret p pop af jp p,NN di call p,NN push af or N rst 48 ret m ld sp,hl jp m,NN ei call m,NN   cp N rst 56

Prefix DDCB

\ x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF
0x rlc b rlc c rlc d rlc e rlc h rlc l rlc (hl) rlc a rrc b rrc c rrc d rrc e rrc h rrc l rrc (hl) rrc a
1x rl b rl c rl d rl e rl h rl l rl (hl) rl a rr b rr c rr d rr e rr h rr l rr (hl) rr a
2x sla b sla c sla d sla e sla h sla l sla (hl) sla a sra b sra c sra d sra e sra h sra l sra (hl) sra a
3x sll b sll c sll d sll e sll h sll l sll (hl) sll a srl b srl c srl d srl e srl h srl l srl (hl) srl a
4x bit 0,b bit 0,c bit 0,d bit 0,e bit 0,h bit 0,l bit 0,(hl) bit 0,a bit 1,b bit 1,c bit 1,d bit 1,e bit 1,h bit 1,l bit 1,(hl) bit 1,a
5x bit 2,b bit 2,c bit 2,d bit 2,e bit 2,h bit 2,l bit 2,(hl) bit 2,a bit 3,b bit 3,c bit 3,d bit 3,e bit 3,h bit 3,l bit 3,(hl) bit 3,a
6x bit 4,b bit 4,c bit 4,d bit 4,e bit 4,h bit 4,l bit 4,(hl) bit 4,a bit 5,b bit 5,c bit 5,d bit 5,e bit 5,h bit 5,l bit 5,(hl) bit 5,a
7x bit 6,b bit 6,c bit 6,d bit 6,e bit 6,h bit 6,l bit 6,(hl) bit 6,a bit 7,b bit 7,c bit 7,d bit 7,e bit 7,h bit 7,l bit 7,(hl) bit 7,a
8x res 0,b res 0,c res 0,d res 0,e res 0,h res 0,l res 0,(hl) res 0,a res 1,b res 1,c res 1,d res 1,e res 1,h res 1,l res 1,(hl) res 1,a
9x res 2,b res 2,c res 2,d res 2,e res 2,h res 2,l res 2,(hl) res 2,a res 3,b res 3,c res 3,d res 3,e res 3,h res 3,l res 3,(hl) res 3,a
Ax res 4,b res 4,c res 4,d res 4,e res 4,h res 4,l res 4,(hl) res 4,a res 5,b res 5,c res 5,d res 5,e res 5,h res 5,l res 5,(hl) res 5,a
Bx res 6,b res 6,c res 6,d res 6,e res 6,h res 6,l res 6,(hl) res 6,a res 7,b res 7,c res 7,d res 7,e res 7,h res 7,l res 7,(hl) res 7,a
Cx set 0,b set 0,c set 0,d set 0,e set 0,h set 0,l set 0,(hl) set 0,a set 1,b set 1,c set 1,d set 1,e set 1,h set 1,l set 1,(hl) set 1,a
Dx set 2,b set 2,c set 2,d set 2,e set 2,h set 2,l set 2,(hl) set 2,a set 3,b set 3,c set 3,d set 3,e set 3,h set 3,l set 3,(hl) set 3,a
Ex set 4,b set 4,c set 4,d set 4,e set 4,h set 4,l set 4,(hl) set 4,a set 5,b set 5,c set 5,d set 5,e set 5,h set 5,l set 5,(hl) set 5,a
Fx set 6,b set 6,c set 6,d set 6,e set 6,h set 6,l set 6,(hl) set 6,a set 7,b set 7,c set 7,d set 7,e set 7,h set 7,l set 7,(hl) set 7,a

Operacje z rejestrem IY